PCB Design

PCB Design

  1. All Categories
  2. Electronics - PCB Design
  3. How to expose Ports (Excitations) from sub-design to the toplevel design in HFSS 3D Layout

How to expose Ports (Excitations) from sub-design to the toplevel design in HFSS 3D Layout

Tagged: 16.2, Designer, Electromagnetics & Electronics, EM Design, Subdesign
    • May 25, 2023 at 7:30 am
      SolutionSolution
      Participant

      Follow the below procedure to to expose the excitations defined in the sub-design to the toplevel design • Double-click on the Top design (EMDesign1) in the Project Manager window (to make it as the active design • Select Sub design in the Layout editor i. Right-click in the Layout editor and select Port > Create Port on Component… • In the Create Ports window i. Select ii. Click the OK button Ports (Excitations) defined in the Sub design will be exposed to the Top design. Please find the attached pdf document

      Attachments:
      1. 3DLayout_Expose_Ports_from_SubDesign.pdf

Featured Articles

Introducing Ansys Electronics Desktop on Ansys Cloud

The Watch & Learn video article provides an overview of cloud computing from Electronics Desktop and details the product licenses and subscriptions to ANSYS Cloud Service that are...

How to Create a Reflector for a Center High-Mounted Stop Lamp (CHMSL)

This video article demonstrates how to create a reflector for a center high-mounted stop lamp. Optical Part design in Ansys SPEOS enables the design and validation of multiple...

Introducing the GEKO Turbulence Model in Ansys Fluent

The GEKO (GEneralized K-Omega) turbulence model offers a flexible, robust, general-purpose approach to RANS turbulence modeling. Introducing 2 videos: Part 1 provides background information on the model and a...

Postprocessing on Ansys EnSight

This video demonstrates exporting data from Fluent in EnSight Case Gold format, and it reviews the basic postprocessing capabilities of EnSight.

© 2024 Copyright ANSYS, Inc. All rights reserved.