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Electronics

Electronics

Topics related to HFSS, Maxwell, SIwave, Icepak, Electronics Enterprise and more.

HFSS EM simulation error “Port ‘1’ eliminated.”

    • btober
      Subscriber

      Hello,


      I am having an error with my relatively simple model simulation. I am modeling the antenna pattern of a dipole antenna mounted on a spacecraft. The model works with the dipole and the spacecraft bus. However, when I go to add solar panels and run the simulation I receive the following error:
      "[error] Port refinement, process hf3d error: Port '1' eliminated.  Likely causes are Material Override or faulty material assignment."


      I have checked multiple times that the objects in my model do not overlap and that they have materials assigned. The strange thing is that when I remove one panel or the other, the model works. When I add both panels, the simulation fails. It does not seem to matter which panel is added, the model completes with one, and fails with two.

    • btober
      Subscriber

      Also, this error only seems to happen when my solar panels are larger than a certain size. The simulation works when they're 4.55 meters long, and fails if they're 4.60 meters. I am needing to simulate them at 5.35 meters, but cannot get the simulation  to complete.

    • rtk
      Ansys Employee

      Hello,


      Just check the following possibilities for the error:


      1. Whether your port is overlapping with some material, Or any materials are interfering with each other. You can opt for HFSS >> Design Settings... >> 'Enable Material override' and see whether the error disappears.


      2. If there is any Boolean operations, like Unite or Subtract make sure it went correctly.


      3. Construct non materialistic boundary or structure around the outer design and then select port.


       


      Regards

    • btober
      Subscriber

      Thanks you @rtk.

      1) material override is enabled under Design Settings.
      2) I have not used boolean operations.
      3) I have a open PML region outside my design. Is this what you are referring to? The antenna used in my simulation is a dipole antenna excited by a center fed lumped port.


      As I said, the simulation completes without error if the solar panels(gallium arsenide boxes) are less than 4.55 meters in length. However I need to simulate them at 5.35 meters. Why would the simulation fail when these go above a certain size. There is nothing in my design which the panels are overlapping with.

    • rtk
      Ansys Employee

      Hello,


      This could be an after effect of Material or Object intersection. 


      If you could share some snapshots of the model in two lengths of solar panels, with error message and profile data it would be understandable.


      Also, you can try Modeler >> Model Analysis and the Modeler >> Model Preparation, to check your model geometrical error and heal/stitch as required.


       


      Regards,

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