Overview
To achieve higher levels of autonomous driving, such as Level 3 and Level 4, the industry is moving toward a modern, scalable, and adaptable electrical/electronic (E/E) architecture, along with a significant increase in the number of sensors. This evolution requires fewer but more powerful ECUs capable of processing and fusing vast amounts of sensor data in real time. However, this shift introduces challenges in electromagnetic interference (EMI), electromagnetic compatibility (EMC), and thermal management. Additionally, high-speed, low-latency communication between zonal controllers and centralized compute units becomes essential. During this transition, multiple vehicle generations are expected to be launched, progressively moving from traditional distributed systems to zonal architectures. Meeting this challenge requires scalable approaches for development, analysis, delivery, and maintenance, along with collaboration to address the growing needs of OEMs. These advanced vehicles will require innovations in virtualization, cost management, supply chain efficiency, and integration techniques.
Advancements in electronics development are critical across the entire spectrum, “from chip to system,” to support the growing complexity of modern SDV architectures. By leveraging physics-based simulation, the industry is enhancing signal integrity, optimizing power distribution, and improving thermal management to meet stringent automotive standards. These tools also accelerate design cycles and enable early validation of system performance, which is essential for meeting safety, reliability, and regulatory requirements in increasingly software-defined and sensor-rich vehicles.
These innovations play a critical role in enabling the scalability and adaptability required for modern E/E architectures.
What Attendees Will Learn
- Developing chip-to-systems (and how our solution connects to Synopsys) capable of being integrated into any operating system and hardware, with secure, remote updates
- Creating high-performance, reliable electronic designs that meet stringent automotive standards
- Preventing component failure, maintaining signal quality, and minimizing electromagnetic interference.
- Leveraging AI and GPU solvers to enhance simulation accuracy, speed, and efficiency
Who Should Attend
- Systems Engineer (E/E at OEM/Supplier)
- Chip Designer (Chip at OEM or Semiconductor Co.)
- Electronics Engineers (OEM/Supplier Tier 1/2)
Speakers
- Flavio Calvano, Ansys
- Jerome Toublanc, Ansys
- Saeed Jarangirian, Ansys
Date / Time:October 9, 2025
9:00 AM EDT
Venue:Virtual
- Cost:
No reviews available for this learning resource.
