Basics of Phase Locked Loop

This course covers the essentials of Phase Locked Loop (PLL) design, a crucial component in RF transceiver design. The course begins with an introduction to the different types of PLLs, their basic parameters, and their role in RF transceiver design. For instance, students will learn about the importance of loop bandwidth, phase noise, transient response, and spectrum purity in PLL design. The course also delves into the concept of phase detection, implemented using XOR gates, and the transfer function in the phase domain. The second part of the course focuses on the basic types of PLL, namely Type 1 and Type 2, their transfer functions, and drawbacks. It also explores the concept of a Phase Frequency Detector, the need for a charge pump in the system, and the limitations of analog PLL and how digital PLL can overcome these limitations. This course has been developed by Prof. Darshak Bhatt from IIT Roorkee for NPTEL. It is now accessible through Ansys Innovation Space courtesy of the partnership between Ansys and NPTEL, under the CC BY-SA license. For more details, visit https://nptel.ac.in/courses/108107379.