TAGGED: designmodulator, interconnect
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November 12, 2024 at 6:52 amM202471681Subscriber
The left picture is the routine file from the official website, and the right picture is the simulation file when I replace the modulator with a two-segment microring . I need to simulate the tdecq indicator of the modulator, and the following error is reported during the simulation process. Since the official website does not explain in detail how to use the tdecq module, could you please provide me with the analyzing script of the tdecq module and other files to help me understand and modify the parameters?
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November 26, 2024 at 4:48 pmKyleAnsys Employee
This error message is due to a bug that was fixed in version 2023 R1.3. The updated version should be able to automatically invert the signal. Please update your software, and redownload the design kit with the TDECQ element from the page: TDECQ simulation and analysis with Lumerical INTERCONNECT – Ansys Optics
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