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Capacitance analysis of parallel plate capacitors in MAPDL

    • ty_jpn
      Subscriber

      Dear everyone

      Hi,The following script was created to determine the fringe capacitance of parallel plate electrodes in MAPDL.

      ---------------------------------

      do,i,0,100,10 !変数,初値,終値,増幅度(ループの始まり)
       
      fini
      /cle
       
      /vie,1,1,1,1
      /sys,del file*.png
       
      /PREP7
       
       
      C*** Plate dimensions (um scale)
      eps0=8.854e-12 ! FREE SPACE PERMITTIVITY
       
      width = (100*1e-6) + (i*1e-6)
      height = 20*1e-6
      thickness = 3*1e-6
      separation = 10*1e-6
       
      d_dmn = 10*1e-6 ! DEPTH SURROUNDING DOMAIN EXTENDS BEYOND ELECTRODES
      d_inf = 5*1e-6 ! DEPTH OF INFINITE BOUNDARY ELEMENT MESH
       
      esz = 3*1e-6  ! MESH SIZE
       
      V = 0.01 ! APPLIED VOLTAGE
       
       
      C*** Configured for electrostatic analysis of 3D 8-node elements
      ET,1,SOLID123
       
       
      C*** Define infinite element
      ET,2,111,2,1
       
      C*** Material properties (relative dielectric constant in vacuum)
      !MP,PERX,1,8.854e-12 ! THIS IS ABSOLUTE PERMITTIVITY IN MKS, WHICH WORKS OK, BUT...
      MP,PERX,1,1 ! WE GENERALLY USE RELATIVE PERMITTIVITY INSTEAD
       
       
       
       
      C*** Create your first plate
      BLOCK,0,width,0,height,0,-thickness
      cm,electrode1_a,area
       
       
      C*** Create second plate
      asel,none
      BLOCK,0,width,0,height,separation,separation+thickness
      cm,electrode2_a,area
       
       
      C*** SURROUNDING DOMAIN
      alls
      cm,scrap1_v,volu
      *get,xmin,kp,,mnloc,x
      *get,xmax,kp,,mxloc,x
      *get,ymin,kp,,mnloc,y
      *get,ymax,kp,,mxloc,y
      *get,zmin,kp,,mnloc,z
      *get,zmax,kp,,mxloc,z
      vsel,none
      bloc,xmin-d_dmn,xmax+d_dmn,ymin-d_dmn,ymax+d_dmn,zmin-d_dmn,zmax+d_dmn
      cm,scrap2_v,volu
      alls
      vsbv,scrap2_v,scrap1_v
       
       
      C*** MESH
      esiz,esz
      vmes,all
       
       
      C*** ELECTRODE VOLTAGE
      da,electrode1_a,volt
      da,electrode2_a,volt,V
       
      fini
       
       
      C*** SOLVE
      /solu
      alls
      save
      solv
      fini
       
       
      C*** POST PROCESS
      /post1
      set ! READ RESULTS INTO MADL DATABASE
       
      etab,w,sene ! BASED ON ENERGY
      ssum
      *get,Wnet,ssum,,item,w
      C1 = 2*Wnet/(V**2)
       
      nsel,s,d,volt ! BASED ON CHARGE & VOLTAGE
      fsum
      *get,q,fsum,,item,chrg
      c2 = q/v
       
      C_nominal=eps0*(height*width)/separation ! NOMINAL FRINGE FREE VALUE
       
      /tla,-0.35,0.90,Capacitance (ANSYS, energy) = %C1% Fd ! ANNOTATION
      /tla,-0.35,0.85,Capacitance (ANSYS, Q/V) = %C2% Fd
      /tla,-0.35,0.80,Capacitance (nominal fringe-free) = %C_nominal% Fd
       
      alls ! CAPPED SECTION PLOTS
      wpro,,,90
      wpof,,,width/2
      /type,1,7
      /cpl,1
       
      *enddo  !指定の値で終わり
       
      plns,volt
      /sho,png $plns,volt $/sho,close $/wait,2
      plve,ef,,,,vect,,on
      /sho,png $plve,ef,,,,vect,,on $/sho,close $/wait,2
       
       
      /eof
      ----------------------------------------
      The capacitance of only the overlapping electrodes can be determined by a theoretical formula, but how should the capacitance be approached taking into account the electric field of the fringes?
      In this script, the do syntax is turned and parsed using the length of the electrode as a parameter.
       
      Best regards, and thank you.
       
      Takabayashi
       
    • Bill Bulat
      Ansys Employee

      Hi Yuuhi,

      I'm sorry I don't quite understand your question. The input file creates annotated images such as the one below. The first two lines of annotation report the MAPDL-calulated capacitance including fringing deduced from results in two different ways. The third line reports the analytical fringe-free value, which is, as we expect, smaller.

      Maybe I'm missing something, but I don't see how you are using loop variable "i" to vary the size or separation of the plates. Are you asking how to vary the geometry in a do loop to investigate the effect of geometry on fringing and capacitance?

      Or are you asking for an analytical expression that accounts for field fringing so that you can validate the calculated value from the finite element model? You might have to search the internet for that. I don't think that this article is exactly what you want, but it might help give you an idea what kind of articles you might find if you look further:

      (PDF) Effect of Fringing Fields on the Capacitance of Circular Microstrip Disk (researchgate.net)

      Kind regards,

      Bill

       

       

       

      • ty_jpn
        Subscriber

        Hi Bill.

        Thank you very much for reply.

        The effect of the fringe electric field is simulated for each of the given capacitor dimension parameters, with the aim of deriving an approximate analytical expression. (e.g. the respective effects when looping the capacitor width in the do syntax from 0-200).

        I understand about the annotations on theoretical values and fringe electric field estimation.

        I want to output a list of the results when I loop through the results with the do syntax for this purpose.

        Best regards, and thank you.

         

        Takabayashi

         

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