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Semiconductors

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  3. ANSYS Totem: Debugging IR Drop issues

ANSYS Totem: Debugging IR Drop issues

Tagged: Analog, Electromigration, IP, Mixed signal, power-integrity, reliability, Voltage Drop
    • June 3, 2022 at 1:43 pm
      Watch & LearnWatch & Learn
      Participant

      “This video introduces the ANSYS Totem Graphical User Interface (GUI) to help you effectively use the tool to identify and uncover design issues while performing power integrity (IR) analysis . This video highlights basic features of the Totem GUI such as debug maps and reports for identifying and root causing IR drop and EM issues. In addition, it demonstrates Totem’s unique features including Short Path Trace (SPT), net based views, violation cross-probing, region and device based current/voltage plots, decap views, etc.
      https://www.youtube.com/watch?v=9AGoDIk9QqA”;

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