Learning Forum

[cchen]

Hi, I am new to Ansys DDR4 simulation. I followed the DDR wizard in SIwave and automatically created schematic in desktop. But when I generate compliance report, I am keep getting eyediagram where DQ and DQs intersects with each other. It seems a paramter issue (phase shift or delay for DQs?) but i don't know how to adjust it. Could you help me with this. Thanks!

[cchen]

Just follow up, any suggestions?

[shsaxb]

Is it ReadMode or WrteMode ? In Readmode, The DQS is aligned with DQ

[cchen]

I tried both readmode and write mode. Neither works in compliance toolkit. 

I understand in readmode DQ waveform should be edge-aligned with DQS diff waveform and in writemode they are center-aligned. I believe I choose the correct mode in toolkit as well. But it's not working.