Learning Forum

[Muhammad Zakir Baig]

Hello there! I am writing here after going through all of the available resources openly available on the internet (google, YouTube). I am trying to do the thermal analysis of my PCB with four stacked step-down buck converter ICs each of which takes 3.3V/4.112A input and should give 0.75V/15A output with 2.32 W of power loss and together they give an output supply to load as 0.75V/60A. I followed the DC IR configuration SiWave videos (Ansys How to/OZEN/PADTInc) and set the voltage sources and current sources accordingly. After simulation in the power tree, what I observed is that the current was not distributed evenly at the output of each IC i.e. 15A. I tried to set the two of the voltage sources on the output side as current sources to equalize their currents to 15A but then I observed that the other two still are not sharing the current equally therefore I made all three ICs current sources and the first one as voltage source with 0.75V and its negative node as reference. 
Q#1. I used the current source in SiWave which is a current sink if I put a positive current value in it so to make it a current source I used a negative value in it. Is it right to do it? In the power tree, the diagram looks weird and the sources are on the right side and not starting from left most side as the voltage source but still the output current becomes equal to 60A (current sink), and the nodes of all these current sources are connected to the positive supply of first IC acting as voltage source.
Q#2. Shall I set the negative terminals of these three current sources to GND or leave them floating? I tried with both and haven't seen any difference in the current density plot of the top layer and also in the power tree map. But I am unsure which case is good.
Q#3. I use the manual option of declaring my voltage and current sinks/sources by using the generate circuit element on components in the tools menu and I see the changes in the components section when I add these but when I go to SiWave workflow wizard for the dc ir analysis I can't see any of the voltage and current sources reflected there but still, I continue without setting anything there and run the simulation and I get the results correct. Is there any way that I can make my changes reflected on the dc ir configuration pop-up window?
Q#4. I want to plot the overall thermal results due to the power loss in copper conductors (DC IR Analysis) and the power loss in the IC packages (Icepak). I have already done the thermal analysis with ICs treating them as heat sources (2.32W) and got the surface temperature plot. After doing the DC Analysis I wanted to get the thermal plot of the whole board which will portray the temperature of the board due to losses in copper lines instead of the active elements (ICs). But while getting that plot by using the Icepak option in the simulation tab of SiWave, I entered the power loss values of these ICs as well which I suppose shouldn't be the case. When I got the results and viewed them in Icepak the temperature of ICs this time was way more than I got in only thermal simulation of ICs in Icepak (by using their dxf files). Therefore even if I disregard the power loss of ICs in the second case how can I merge both temperature plots to get an overall picture?

I am sorry for the lengthy questions as this is the only way you can get intuition of my case otherwise it would have been difficult to understand my case. Also, I would be grateful if you share any helping material that explains my problem. Looking forward to receiving your response. Thanks and bye :)

[Mrinmoy Bharadwaj]

 

Hello Zakir,
Thanks for writing to us and being elaborate on your query. Here are the answers to some of your queries:

Q#1: Answer: There is no need to define a negative current in the current source in SIwave. You must define the max current value that can flow through that particular power net as the value of the current source (in Ampere). For the next part of the query, a snap of the power tree would be needed to comment anything specific to your requirement and observations.

Q#2: Answer: The negative terminals of the current source and its corresponding voltage source must be connected to the same net at respective location. In other words, both the voltage and current source for a particular power net must take reference from the safe net in the PCB. The negative net of the voltage source is put to ground as per the workflow. No terminal must remain floating.

Q#3: Answer: If the voltage and current sources are connected exactly the same way in which the wizard does, the manually created sources do reflect in the DCIR configuration wizard as well. This can be seen below:
 
The workflow wizard creates pin groups of the positive and the reference nets and creates the voltage/current source between these pin  groups. While doing manually, if the same process is followed, the sources will be reflected in the workflow wizard as well.

Q#4: Answer: To see a combined temperature plot of both ICs and traces, you need to perform an independent Icepak simulation wherein you will define the IC power loss (2.32W) as the heat source and for PCB layers import the .out/.outb powermap files obtained as a power map export after DCIR simulation in SIwave.

I hope the above explanation was helpful.