We’re putting the final touches on our new badges platform. Badge issuance remains temporarily paused, but all completions are being recorded and will be fulfilled once the platform is live. Thank you for your patience.

Ansys Learning Forum › Forums › Discuss Simulation › Electronics › Simulating the PCB layout for S parameter and impedance matching › Reply To: Simulating the PCB layout for S parameter and impedance matching

March 11, 2024 at 4:29 pm
Aymen Mzoughi
Ansys Employee

For enhanced accuracy, I recommend using Ansys HFSS in combination with the Modelithics library:
https://www.ansys.com/partner-ecosystem/technology-partners/modelithics
To synthesize impedance matching networks, you can use AEDT Circuit in conjuction with HFSS (Just by drag and drop the HFSS deign into the Circuit design within AEDT).