Overview

Signal and power integrity (SI/PI) are critical aspects of high-speed electronic design that ensure high-speed data, such as SERDes (serializer/deserializer) and DDR (Double Data Rate) memory interfaces, are transmitted accurately and reliably.

EM simulations are essential for accurately predicting SI/PI performance but often require a complex and time-consuming manual setup process. Engineers must define numerous parameters, including port definitions, stack-up and material properties, boundary conditions, cutout frequency sweeps, and more. When performed manually, these tasks are not only labor-intensive but also error prone.

A major benefit of automation in SI/PI design is the faster design iterations, which significantly reduce the engineering time required to set up electromagnetic (EM) simulations.

During this webinar, you will discover how automation reduces simulation setup times from hours to seconds, allowing designers to focus more on analyzing results. We'll demonstrate the following automated workflows:

• Reuse of layout configuration for HFSS / SIwave [SYZ] extraction
• Reuse of layout configuration for DCIR power integrity analysis
• How to parameterize new or existing layouts

Learning Outcomes

• Introduction to Ansys signal and power integrity solution
• Automate Electronics Desktop with PyAEDT the open-source Python package
• Efficient automation of the layout setup workflow within PyAEDT
• Reuse of configuration across different design iterations
• Generate parametrized geometry for design exploration

Who Should Attend

Electronics layout engineers who want to compute quick verification on PCB during the design process or during the validation phase before prototyping.

Speakers

• Georgios Korompilis, Ansys Application Engineer
• Hui Zhou, Ansys Senior Application Engineer