{"id":170419,"date":"2023-05-25T07:29:53","date_gmt":"2023-05-25T07:29:53","guid":{"rendered":"\/knowledge\/forums\/topic\/how-to-improve-ls-dso-stability\/"},"modified":"2023-07-31T12:34:18","modified_gmt":"2023-07-31T12:34:18","slug":"how-to-improve-ls-dso-stability","status":"publish","type":"topic","link":"https:\/\/innovationspace.ansys.com\/knowledge\/forums\/topic\/how-to-improve-ls-dso-stability\/","title":{"rendered":"How to improve LS DSO stability?"},"content":{"rendered":"<p>First, if you faced some issues that not all variations are solved, you can use new mechanism that allows you to set a number of attempts before solver will give up. You need to use new batch option LargeScaleDSO\/FailedVarRetryCount.  Second, if you have seen that variations on some node are already finished, but on other machines there are still plenty of design points to solve, you can use LargeScaleDSO\/VarRedistribution this will automatically redistribute variations and maximize utilization efficiency  for more info please read help: https:\/\/ansyshelp.ansys.com\/Views\/Secured\/Electronics\/v212\/en\/home.htm#..\/Subsystems\/HFSS\/Content\/HPC\/LargeScaleDSOCommandLineSyntax.htm?Highlight=FailedVarRetryCount%20   and finally, in release 2021R2 an option LargeScaleDSO\/SleepBetnEngines=5 was enabled by default. it will set a delay of 5 seconds between start of each LS DSO engine (not between each design point, so this time is nothing compared to total sim time) this will prevent fail of variations on start  all options with description you can find in UI while submit a job: see attached screenshot<\/p>\n<p>Attachments:<br \/>\n1. <a href=https:\/\/ansys13.ansys.com\/KnowledgeArticles\/Phase-2B\/2065239\/ls_dso_batch_opt.jpg>ls_dso_batch_opt.jpg<\/a><\/p>\n","protected":false},"template":"","class_list":["post-170419","topic","type-topic","status-publish","hentry","topic-tag-2021-r2","topic-tag-electromagnetics-electronics","topic-tag-electronics-desktop-framework","topic-tag-hpc","topic-tag-other"],"aioseo_notices":[],"acf":[],"custom_fields":[{"0":{"_wp_page_template":["default"],"_bbp_last_active_time":["05-25-2023  20:20:01"],"_bbp_forum_id":["27819"],"_bbp_author_ip":["209.182.204.162"],"_btv_view_count":["293"],"siebel_km_number":["2065239"],"product_version":["2021 R2"],"km_published_date":["2021-08-09T00:00:00.000Z"],"family":["Electromagnetics & Electronics"],"application_name":["Electronics Desktop Framework"]},"test":"solution"}],"_links":{"self":[{"href":"https:\/\/innovationspace.ansys.com\/knowledge\/wp-json\/wp\/v2\/topics\/170419","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/innovationspace.ansys.com\/knowledge\/wp-json\/wp\/v2\/topics"}],"about":[{"href":"https:\/\/innovationspace.ansys.com\/knowledge\/wp-json\/wp\/v2\/types\/topic"}],"version-history":[{"count":0,"href":"https:\/\/innovationspace.ansys.com\/knowledge\/wp-json\/wp\/v2\/topics\/170419\/revisions"}],"wp:attachment":[{"href":"https:\/\/innovationspace.ansys.com\/knowledge\/wp-json\/wp\/v2\/media?parent=170419"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}