


{"id":49579,"date":"2020-11-04T20:02:52","date_gmt":"2020-11-04T20:02:52","guid":{"rendered":"\/forum\/forums\/topic\/what-is-the-source-that-ansys-is-using-for-the-level-54-mosfet-devices\/"},"modified":"2020-11-04T20:02:52","modified_gmt":"2020-11-04T20:02:52","slug":"what-is-the-source-that-ansys-is-using-for-the-level-54-mosfet-devices","status":"closed","type":"topic","link":"https:\/\/innovationspace.ansys.com\/forum\/forums\/topic\/what-is-the-source-that-ansys-is-using-for-the-level-54-mosfet-devices\/","title":{"rendered":"What is the source that Ansys is using for the level 54 MOSFET devices?"},"content":{"rendered":"<div class=\"Item-Body\">\n<div class=\"Message userContent\">\n<p>I am trying to determine the input impedance to a chain of cascaded CMOS inverters. I have a working simulation using the Nexxim Transient Analysis but when the input clock is low (0 Volts), the impedance I measure by doing V(port1)\/I(port1) is -50 ohms. That could potentially be correct, but I have no way to verify it if I don&#039;t know how Ansys is actually treating the device. I attached a picture of my circuit.<\/p>\n<div class=\"embedExternal embedImage\">\n<div class=\"embedExternal-content\">\n<a class=\"embedImage-link\" href=\"https:\/\/us.v-cdn.net\/6032193\/uploads\/G70PMHC3LCAG\/ten-imported-inverters-cascaded.png\" rel=\"nofollow noopener\" target=\"_blank\"><br \/>\n<img decoding=\"async\" class=\"embedImage-img\" src=\"https:\/\/us.v-cdn.net\/6032193\/uploads\/G70PMHC3LCAG\/ten-imported-inverters-cascaded.png\" alt=\"Ten Imported Inverters Cascaded.png\" \/><br \/>\n<\/a><\/p>\n","protected":false},"template":"","class_list":["post-49579","topic","type-topic","status-closed","hentry","topic-tag-impedance","topic-tag-port-impedance"],"aioseo_notices":[],"acf":[],"custom_fields":[{"0":{"_bbp_old_topic_id":["21817"],"_bbp_old_topic_author_name_id":["Anonymous"],"_bbp_old_is_topic_anonymous_id":["false"],"_bbp_old_closed_status_id":["publish"],"_bbp_author_ip":["?\u05d0?"],"_bbp_old_sticky_status_id":["normal"],"_bbp_likes_count":["0"],"_btv_view_count":["582"],"_bbp_subscription":["257079"],"_bbp_topic_status":["unanswered"],"_bbp_status":["publish"],"_bbp_topic_id":["49579"],"_bbp_forum_id":["27793"],"_bbp_engagement":["28551","182937"],"_bbp_voice_count":["2"],"_bbp_reply_count":["1"],"_bbp_last_reply_id":["132262"],"_bbp_last_active_id":["132262"],"_bbp_last_active_time":["2020-11-06 08:24:08"]},"test":"andrewkaz"}],"_links":{"self":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics\/49579","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics"}],"about":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/types\/topic"}],"version-history":[{"count":0,"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics\/49579\/revisions"}],"wp:attachment":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/media?parent=49579"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}