


{"id":286791,"date":"2023-06-02T01:27:47","date_gmt":"2023-06-02T01:27:47","guid":{"rendered":"\/forum\/forums\/topic\/how-to-model-microstrips-coupled-to-differential-pair\/"},"modified":"2023-06-07T12:22:31","modified_gmt":"2023-06-07T12:22:31","slug":"how-to-model-microstrips-coupled-to-differential-pair","status":"closed","type":"topic","link":"https:\/\/innovationspace.ansys.com\/forum\/forums\/topic\/how-to-model-microstrips-coupled-to-differential-pair\/","title":{"rendered":"How to model microstrips coupled to differential pair?"},"content":{"rendered":"<p>Hello,<\/p>\n<p>I want to simulate a differential pair that is capacitively coupled to a microstrip pair. I made a simplified geometry of my actual resonator. I assigned PerfE boundaries to each microstrip and pad element in yellow. There is no GND plane in this model, the wires act as reference and do not receive direct excitation. I am confused about how to create a port for this model. Any suggestions?<\/p>\n<p><a class=\"wp-colorbox-image cboxElement\" href=\"\/forum\/wp-content\/uploads\/sites\/2\/2023\/05\/10-05-2023-1683680703-mceclip0.png\"><img decoding=\"async\" src=\"\/forum\/wp-content\/uploads\/sites\/2\/2023\/05\/10-05-2023-1683680703-mceclip0.png\"><\/a><\/p>\n<p>&nbsp;<\/p>\n<p>I added two lumped ports and edited the sources to be 180 degrees out of phase with respect to each other. I was able to create a differential pair under&nbsp; &#8220;Excitations&#8221; using this configuration. This does not give errors and can give a solution, but is it physically correct? Thanks.<\/p>\n<p>&nbsp;<\/p>\n<p><a class=\"wp-colorbox-image cboxElement\" href=\"https:\/\/mail.google.com\/mail\/u\/1?ui=2&amp;ik=dee847e9f9&amp;attid=0.1&amp;permmsgid=msg-a:r-4700106070746530533&amp;th=188032dabd87641f&amp;view=fimg&amp;fur=ip&amp;sz=s0-l75-ft&amp;attbid=ANGjdJ_sNSobZ_WdoMbMxhmurhk74Et1p60ooTngJh5sr4rXbYq6aQ5Q4oHFUT8OVu9hKVvisbw61hJlnCRHxt7NwNTdMsgTQr15s98CMc8XlEaIrnRGbE_ujLMnAJI&amp;disp=emb&amp;realattid=ii_lhgzu7fm1\"><img decoding=\"async\" src=\"https:\/\/mail.google.com\/mail\/u\/1?ui=2&amp;ik=dee847e9f9&amp;attid=0.1&amp;permmsgid=msg-a:r-4700106070746530533&amp;th=188032dabd87641f&amp;view=fimg&amp;fur=ip&amp;sz=s0-l75-ft&amp;attbid=ANGjdJ_sNSobZ_WdoMbMxhmurhk74Et1p60ooTngJh5sr4rXbYq6aQ5Q4oHFUT8OVu9hKVvisbw61hJlnCRHxt7NwNTdMsgTQr15s98CMc8XlEaIrnRGbE_ujLMnAJI&amp;disp=emb&amp;realattid=ii_lhgzu7fm1\" alt=\"image.png\"><\/a><\/p>\n","protected":false},"template":"","class_list":["post-286791","topic","type-topic","status-closed","hentry","topic-tag-ansys-hfss","topic-tag-hfss","topic-tag-lumped-port","topic-tag-lumped-ports","topic-tag-microstrip","topic-tag-ports-2"],"aioseo_notices":[],"acf":[],"custom_fields":[{"0":{"_bbp_subscription":["46410","1178","28551"],"_bbp_author_ip":["23.206.193.154"]," _bbp_last_reply_id":["0"]," _bbp_likes_count":["0"],"_btv_view_count":["534"],"_edit_lock":["1685741100:187963"],"_bbp_status":["publish"],"_bbp_topic_status":["unanswered"],"_bbp_topic_id":["286791"],"_bbp_forum_id":["27793"],"_bbp_engagement":["1178","28551","46410"],"_bbp_voice_count":["3"],"_bbp_reply_count":["2"],"_bbp_last_reply_id":["287531"],"_bbp_last_active_id":["287531"],"_bbp_last_active_time":["2023-06-07 12:22:20"]},"test":"sroccaucla-edu"}],"_links":{"self":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics\/286791","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics"}],"about":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/types\/topic"}],"version-history":[{"count":0,"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/topics\/286791\/revisions"}],"wp:attachment":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/media?parent=286791"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}