{"id":382169,"date":"2024-09-10T12:59:08","date_gmt":"2024-09-10T12:59:08","guid":{"rendered":"https:\/\/innovationspace.ansys.com\/forum\/forums\/reply\/382169\/"},"modified":"2024-09-10T12:59:08","modified_gmt":"2024-09-10T12:59:08","slug":"382169","status":"publish","type":"reply","link":"https:\/\/innovationspace.ansys.com\/forum\/forums\/reply\/382169\/","title":{"rendered":"Reply To: IR2110 gate driver model in ansys simplorer 2022.R1"},"content":{"rendered":"<p>&lt;p&gt;Hi SP, both Vhi to ground and Vs to ground are pulsating signals with respect to frequency, voltage between hi and vs is a flat line because those pulses canceled out.&lt;\/p&gt;<\/p>\n","protected":false},"template":"","class_list":["post-382169","reply","type-reply","status-publish","hentry"],"aioseo_notices":[],"acf":[],"_links":{"self":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/replies\/382169","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/replies"}],"about":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/types\/reply"}],"version-history":[{"count":0,"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/replies\/382169\/revisions"}],"wp:attachment":[{"href":"https:\/\/innovationspace.ansys.com\/forum\/wp-json\/wp\/v2\/media?parent=382169"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}